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Silicon Labs /EFR32FG23B010F512IM48 /DCDC_S /STATUS

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Interpret as STATUS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BYPSW)BYPSW 0 (WARM)WARM 0 (RUNNING)RUNNING 0 (VREGIN)VREGIN 0 (BYPCMPOUT)BYPCMPOUT 0 (PPMODE)PPMODE 0 (PFMXMODE)PFMXMODE

Description

DCDC Status Register

Fields

BYPSW

Bypass Switch is currently enabled
WARM

DCDC Warmup Done
RUNNING

DCDC is running
VREGIN

VREGIN comparator status
BYPCMPOUT

Bypass Comparator Output
PPMODE

DCDC in pulse-pairing mode
PFMXMODE

DCDC in PFMX mode

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data